I. Field of the Invention
This invention relates to data processing systems and more specifically to a controller for controlling and coupling at least one peripheral unit to a central processing unit and a high speed memory unit.
II. Prior Art
Data processing systems usually have several secondary storage devices for recording data on or reading data from a recording medium. Such a medium has included a magnetic drum memory device, a magnetic tape device or a disk memory device. It is often desirable to transfer data from one of these devices to a high speed memory unit, or conversely, to transfer data from the high speed memory unit to the device.
In prior systems, controller devices have been developed to control the secondary storage facilities and permit them to transfer data between themselves and the high speed memory unit. Such transfer of data, however, was relatively slow, inefficient and had to be accomplished by way of the data processing system's main bus. The main bus, designated as the system bus, interconnects all controller devices, the high speed memory unit and the central processing unit. Since transfer of data has been by way of the system bus, all other bus activities had to cease during such data transfer.
To free the system bus during such data transfers new busses have been developed, designated as memory busses. Such new memory or cache busses have been designed to handle all data transfers between secondary storage facilities and the high speed memory unit. However, this was accomplished only with drastic changes to the data processing system. The controllers had to be redesigned to accommodate the new memory bus. In addition, the bus connecting the secondary storage facilities with the controller also had to be redesigned.
This has led to waste of data processing resources since a user who already owned secondary storage facilities with controllers, had to revamp his entire system. New controller devices had to be purchased, and new interfaces between the secondary storage facilities and controller devices had to be implemented. If this was not done, the user could not take advantage of the memory bus.
Therefore, it is an object of this invention to allow data transfers between existing secondary storage facilities and a high speed memory unit by way of the memory bus.
Another object of this invention is to maintain the interfaces between existing controller and the system bus. Thus, all interchanges of signals or handshaking operations are performed as they have been in prior systems, with the addition of direct, high speed memory transfer by way of a memory bus.